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  green mode pwm contro ller ap3102/v/l preliminary datasheet 1 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited general description the ap3102/v/l series is a green-mode pwm control- ler with low start-up current. at normal operation, the switching frequency is externally programmable and trimmed to tight range, the frequency dithering technique is also equipped to improve the emi performance. when the load is very low or zero, the ic enters green mode and skip mode to minimize switch- ing loss. in skip mode, the pwm switching frequency is about 20khz to avoid th e audible noise and reduce the standby loss. the ap3102/v/l series features a lot of functions such as the leading-edge blanki ng (leb) of the current sensing, internal slope compensation, line compensa- tion, and several protection functions including cycle- by-cycle current limit (ocp ), over voltage protection (vcc or line voltage), otp, olp and brownout pro- tection. the ap3102/v/l series provides 3 different versions with optional protection functions. ap3102 has exter- nal trigger latch shutdown only (vovp and olp are auto recoverable). ap3102v supports both vovp and external latch shutdown. ap3102l provides latch shut- down control for vovp, olp and external trigger. this ic is available in soic-8 and dip-8 packages. features bi-cmos process with excellent performance very low start-up current: 5a typical current mode control non-audible-noise green mode control frequency foldback for high average efficiency internal slope compensation programmable brownout protection programmable line compensation useful pin fault protection: sense pin floating ri pin short to ground ri pin floating smart latch/auto-recoverable protection option comprehensive protection feature: vcc over voltage protection (vovp) line over voltage protection (lovp) over temperature protection (otp) over load protection (olp) internal soft start function during start-up 500ma gate output current capability applications switching ac-dc adapter lcd monitor/tv power open frame switching power supply figure 1. package types of ap3102/v/l soic-8 dip-8
green mode pwm contro ller ap3102/v/l preliminary datasheet 2 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited pin configuration pin number pin name function 1 gnd signal ground. current return for driver and control circuits 2 fb feedback. directly conne cted to the opto-coupler 3bok brownout protection pin. connected to a re sistor divider from the ground to bulk capacitor for setting the brownout level a nd line compensation. when the voltage of this pin is lower than 0.5v and lasts 35ms, the pwm signal will be off and system enters the auto recoverable protection mode (hic cup mode). moreover this pin is also for the line ovp (trigger le vel is 4v) and line compen sation (compensate the current sense for over load protection.) 4 ri set the bias current to deter mine the normal switching frequency 5 adj to adjust the level of skip cycle. when its value is greater than 4.5v, the system will be latched 6 sense current sense 7 vcc supply voltage of driver and control circuits 8 gate gate driver output pin description (soic-8) gate vcc gnd adj sense fb bok ri m package figure 2. pin configuration of ap3102/v/l (top view) (dip-8) p package 1 2 3 4 8 7 6 5 1 2 3 4 8 7 6 5 gate vcc gnd adj sense fb bok ri
green mode pwm contro ller ap3102/v/l 3 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited preliminary datasheet functional block diagram figure 3. functional block diagram of ap3102/v/l gnd gate sense latch leb driver 15v q d clk rb fb r 2r 0.85v adj olp 1.1 v olp otp vcc 33 v 28 v ri uvlo 16 .2v 8.8 v internal bias 4.5 v latch 5v 2ms soft start 25 a otp 155 o c bok disable 5k 55 k osc vdd 0.5v 0.9v bok bok 5v 1 a 4v disable ovp ovp protect logic 8 4 3 6 1 2 5 7 latch control logic (note*) ovp olp latch latch ovp contr ol logic for ap 3102 l control logic for ap 3102 v control logic for ap3102 note* latch olp ovp
green mode pwm contro ller ap3102/v/l preliminary datasheet 4 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited ordering information circuit type package m: soic-8 g1: green ap3102 - tr: tape and reel blank: tube p: dip-8 package temperature range part number marking id packing type soic-8 -40 to 85 o c ap3102m-g1 3102m-g1 tube ap3102mtr-g1 3102m-g1 tape & reel ap3102vm-g1 3102vm-g1 tube ap3102vmtr-g1 3102vm-g1 tape & reel AP3102LM-G1 3102lm-g1 tube ap3102lmtr-g1 3102lm-g1 tape & reel dip-8 -40 to 85 o c ap3102p-g1 ap3102p-g1 tube ap3102vp-g1 ap3102vp-g1 tube ap3102lp-g1 ap3102lp-g1 tube product version* blank: ap3102 v: ap3102v l: ap3102l product version external trigger by adj vovp output short (olp) ap3102 latch auto-recovera ble auto-recoverable ap3102v latch latch auto-recoverable ap3102l latch latch latch * product version classification (with different protection functions) bcd semiconductor's products, as designated with "g1" suffix in the pa rt number, are rohs compliant and green.
green mode pwm contro ller ap3102/v/l 5 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited preliminary datasheet parameter symbol value unit power supply voltage v cc 30 v gate output current i o 5 00 ma input voltage to fb, sense pin v fb, v sense -0.3 to 7 v input voltage to ri, adj pin v ri , v adj -0.3 to 7 v thermal resistance junction to ambient ja dip-8 83 o c/w soic-8 186 power dissipation and thermal charac- teristic, sense at t a <25 o c p d dip-8 1359 mw soic-8 550 operating junction temperature t j -40 to150 o c storage temperature range t stg 150 o c esd (human body model) 2500 v esd (machine model) 250 v note 1: stresses greater than those listed under "a bsolute maximum ratings" may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. exposure to "absolute max- imum ratings" for extended periods may affect device reliability. recommended operating conditions parameter symbol min max unit supply voltage v cc 10 25 v ambient operating temperature range t a -40 85 o c absolute maximum ratings (note 1)
green mode pwm contro ller ap3102/v/l preliminary datasheet 6 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited parameter symbol conditions min typ max unit supply voltage (vcc pin) start-up current i start-up v cc =14.8v 5 15 a operating supply current i cc v fb =0v, c l =1nf 1.5 2.5 3.5 ma v fb =3v, c l =1nf 2 3 4 uvlo (on) 15.2 16.2 17.2 v uvlo (off) 7.8 8.8 9.8 v vcc ovp 27 28.5 30 v vcc clamp i cc =5ma 34 v de-latch vcc 4.5 6 7.5 v pwm section/oscillator section maximum duty cycle 70 75 80 % minimum duty cycle 0 oscillation frequency r ri =26k ? 60 65 70 khz frequency in skip mode r ri =26k ? 22 khz frequency temperature stability -40 o c to 85 o c 5% frequency voltage stability v cc =12v to 30v 3% frequency dithering 6 % current sense section (sense pin) maximum sense voltage v cs v bok =0.95v 0.75 0.8 0.85 v v bok =2.76v 0.63 0.68 0.73 leb time of sense 150 250 350 ns delay to output 50 150 250 ns soft-start time 2ms feedback input section (fb pin) the ratio of input voltage to current sense voltage 2.533.5v/v input impedance 3 4.5 6 k ? source current -2 ma input voltage for zero duty v adj =0v 1.2 v electrical characteristics v cc =16v, t a =25 o c, unless otherwise specified.
green mode pwm contro ller ap3102/v/l 7 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited preliminary datasheet v cc =16v, t a =25 o c, unless otherwise specified. parameter symbol conditions min typ max unit output section (gate pin) output low level i o =50ma, v cc =12v 1 v output high level i o =50ma, v cc =12v 8.5 v output clamping 13 15 17 v rising time c l =1nf, v cc =13v 150 250 350 ns falling time c l =1nf, v cc =13v 30 50 90 ns brownout protection (bok pin) brownout turn-on 0.85 0.9 0.95 v brownout turn-off 0.45 0.5 0.55 clamp voltage on bok i bok =1ma 5.5 6.2 6.9 v line compensation ratio 0.055 line ovp voltage 3.5 4 4.5 v skip cycle section (adj pin) source current 10 25 45 a latch trigger voltage 4.2 4.5 4.8 v clamp voltage on adj 4 5 6 v input impedance 35 50 65 k ? over-temperature protection section shutdown temperature 155 o c temperature hysteresis 25 o c delay time section delay 1 of protection output short and olp, bok pin trigger for turning off 25 35 45 ms delay 2 of protection adj, vcc ovp, line ovp bok pin trigger for turning on 25 s electrical characteristics (continued)
green mode pwm contro ller ap3102/v/l preliminary datasheet 8 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited typical performance characteristics figure 4. start-up voltage vs. ambient temperature figure 5. shutdown voltage vs. ambient temperature figure 6. start-up current vs. ambient te mperature figure 7. operation cu rrent vs. ambient temperature -40-20 0 20406080100120 15.0 15.2 15.4 15.6 15.8 16.0 16.2 16.4 16.6 16.8 17.0 ambient temperature ( o c) start-up voltage (v) -40-20 0 20406080100120 0 1 2 3 4 5 6 7 8 start-up current ( a) ambient temperature ( o c) -40 -20 0 20 40 60 80 100 120 140 8.1 8.3 8.5 8.7 8.9 9.1 9.3 9.5 9.7 9.9 shutdown voltage (v) ambient temperature ( o c) -40 -20 0 20 40 60 80 100 120 140 0 1 2 3 4 operation current (ma) ambient temperature ( o c)
green mode pwm contro ller ap3102/v/l 9 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited preliminary datasheet typical performance ch aracteristics (continued) figure 8. maximum v cs vs. ambient temperature figure 9. v bok vs. ambient temperature figure 10. vcc ovp voltage vs. ambient temperature figure 11. oscillation frequency vs. bias resistor -40 -20 0 20 40 60 80 100 120 0.70 0.72 0.74 0.76 0.78 0.80 0.82 0.84 0.86 maximum v cs (v) ambient temperature ( o c) at v bok =0.95v -40-20 0 20406080100120 0.80 0.82 0.84 0.86 0.88 0.90 0.92 0.94 0.96 0.98 1.00 v bok (v) ambient temperature ( o c) 10 15 20 25 30 35 40 45 20 40 60 80 100 120 140 160 180 200 f osc (khz) bias resistor (k ? ) f osc typical -40 -20 0 20 40 60 80 100 120 140 28.00 28.25 28.50 28.75 29.00 29.25 29.50 29.75 30.00 vcc ovp voltage (v) ambient temperature ( o c)
green mode pwm contro ller ap3102/v/l preliminary datasheet 10 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited typical performance ch aracteristics (continued) figure 12. oscillation frequency figure 13. vcc start-up current vs. vcc voltage figure 14. operation current vs. vcc voltage vs. ambient temperature (r8=27k : ) 0481216 0.0 2.0 4.0 6.0 8.0 vcc start-up current ( p a) v cc (v) 0 4 8 12162024 0 1 2 3 4 i cc (ma) v cc (v) -40 -20 0 20 40 60 80 100 120 140 40 50 60 70 80 90 f osc (khz) ambient temperature ( o c) f osc typical
green mode pwm contro ller ap3102/v/l 11 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited preliminary datasheet operation description the ap3102/v/l is specifically designed for off-line ac-dc power supply used in lcd monitor, notebook adapter and battery charger ap plications. it offers a cost effective solution with versatile protection functions for system designer. start-up current and uvlo the start-up current of ap3102/v/l is optimized to realize ultra low current (5 a typical) so that vcc capacitor can be charged more quickly. the direct benefit of low start-up current is the availability of using large start-up resistor, which minimizes the resistor power loss for high voltage ac input. an uvlo comparator is included in ap3102/v/l to detect the voltage on the v cc pin. it ensures ap3102/ v/l to draw adequate ener gy from hold-up capacitor during power on. the turn-on threshold is 16v and the turn-off threshold is 10v. oscillator the oscillation frequency is programmed by the value of resistor r8, connected from pin ri to ground. the resistor will make a constant current source to determine the oscillation frequency by charging and discharging an internal capacitor. the oscillation frequency can be expressed as: the recommended oscillation frequency is 40 to 130 khz from the emi consideration. current sense comparator and pwm latch ap3102/v/l operates as a current mode controller; the output switch conduction is initiated by every oscillator cycle and terminated when the peak inductor current reaches the threshol d level established by the fb pin. the inductor current signal is converted to a voltage signal by insertin g a reference sense resistor r s . the inductor current under normal operating conditions is controlled by the voltage at fb pin, the relation between peak inductor current (i pk ) and v fb is: abnormal operating conditions occur when the power supply output is overloaded or the output voltage sensing is lost. under these conditions, the current sense comparator threshold wi ll be internally clamped to a value related to the value of v bok . as v bok value is proportional to the input line voltage, the constant over load protection can be achieved by compensating the delay time effect from the input line. the maximum peak switch current is: leading  edge blanking a narrow spike on the lead ing edge of the current waveform can usually be observed when the power mosfet is turned on. a 250ns leading-edge blank is built-in to prevent the false-triggering caused by the turn-on spike. during this period, the current limit comparator is disabled and the gate driver can not be switched off. a resistor is usually connected to the current sense pin to avoid the pcb trace interference and it also can adjust the in ductor peak current tinily by the resistance. of course, ad ding a rc filter to cs pin is better to attenuate any unexpected noise. built-in slope compensation it is well known that a continuous current mode smps may become unstable when the duty cycle exceeds 50%. the built-in slope co mpensation can improve the stability, so there is no n eed for design engineer to spend much time on that. fb pin and short circuit protection this pin is normally connected to the opt-coupler and always paralleled wi th a capacitor for loop compensation. when the voltage at this pin is great than 4.2v (such as output short to ground or the opt- coupler is broken) and lasts for about 35ms, the ic will enter the protection mode. fo r ap3102, the system will enter hiccup mode to wait the vcc decreasing to low uvlo level, then the ic will try to restart until the failure removed. for ap3102v, the ic will be latched unless unplugging the ac socket. moreover, if the ) ( ) ( 8 1720 khz k r f ? s fb pk r v i 3 / ) 9 . 0 ( ? = s bok max pk r v i / ) 055 . 0 85 . 0 ( ) ( ? =
green mode pwm contro ller ap3102/v/l preliminary datasheet 12 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited operation descrip tion (continued) voltage is less than 0.7v, the ic will stop the drive pulse immediately. therefore, this feature can be used for short circuit protection, which makes the system immune from catastrophic failure. brown-out and bok pin the switching converter normally has a suitable input range thus make the switc hing component operate under the safe operation condi tion. too low or too high input will bring large heat shock or voltage spike on the switching device. brown-out and line ovp function will avoid the supply to be worked in the unwanted condition such as below minimum and over maximum line voltage. the internal bok connection is shown as the figure below: from the figure, it is seen that the bok is connected to the ocp comparator and used as feedforward to the v cs_max (refer to current sense comparator description). the v bok range for enable ic is 0.9 to 3.0v and disable range is under 0.5v or over than 4v. when v bok is over than 4v (line ovp) or under 0.5v (brown-out trigger), the ic enters the auto-recoverable protection. the ratio of r1/r2 is used to adjust the line voltage divider value. adj pin and green mode operation low standby loss is the main requirement for ac-dc off line power supply. the ap3102/v/l has a green mode operation to improve the light load or no load efficiency. when the load power becomes low and v fb decreases to the threshold va lue, the ic will enter the green mode which means the switching frequency will decrease with the load d ecrease. and when the load power becomes more lower, th e ic will operate at the skip mode to reduce switching loss , core loss and other high frequency loss due to blanking the driver. in skipping mode, the high frequency pulses is about 25khz for the best standby performance. the v adj threshold is adjustable by changing the external resistor connected from pin adj to the ground. adjusting the v adj voltage can optimize the standby power and audible noise for most applications. another function of adj pin is to use it as the latch trigger input. when the voltage at this pin is over than 4.5v, the system will be latched by limiting the v cc to a lower voltage. if the ic is started from bulk capacitor through resistor, the system will be latched until the bulk voltage decreases to a very low value just like unplugged the ac input. then, the ic latch current can ' t be maintained and latch will be released (see description below). this function can be used as system otp and other protection.. system protection and pin fault protection ap3102/v/l provides versatile system and pin fault leb slope compensation skip cycle 0.85v r 2r adj sense a r adj driver control circuit 25 p a 5 2 6 fb von no gate output uvlo vcc 35ms no gate hv ok range voff hv 4v no gate output sense ocp 0.85v bok bok ovp 4v 0.5v 0.9v 5v bok disable uvlo 1 p a v cb r1 r2 3 6 +
green mode pwm contro ller ap3102/v/l preliminary datasheet 13 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited operation descrip tion (continued) protections. the ocp compar ator realizes the cycle- by-cycle current limiting (ocp). cooperating with bok compensation from the input line voltage, the ic realizes the constant over load protection (olp). vcc over voltage protection can be applied as the primary ovp or opt-coupler broken protection. the ap3102/v/ l also has pin fault connection protection including floating and short connection. the floating pin protection include the ri, sense, fb, etc; the short pin protection includes the ri pin short protection. when these pins are floated or ri pin is shorted to ground, pwm switching will be disabled, thus protect the power system. figure 15 shows the relative timing sequences of system protections. figure 15. typical timing sequences of ap3102/v/l protections v bok gate drive uvlo 4v v cc 0.5v 35ms v fb 35ms 4.2v line ovp & brown-out output short vo vcc ovp (ap3102) 25 s 28v v adj gate drive latch until unplug ac uvlo v cc >25 s 4v de-latch point auto recoverable protection mode latch protection mode v adj v fb 35ms 4.2v vo latch through adj pin output short (ap3102l) vcc ovp (ap3102v, ap3102l) 25 s 28v uvlo 25 s
green mode pwm contro ller ap3102/v/l preliminary datasheet 14 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited typical application figure 16. typical application circuit using ap3102 r11 5.1 k c8 0.1 f c3 47 f r12 4.7 k r10 20 k c2 2nf r7 r4 20 r3 3.9 r13 620 r6 0.55 q1 7n60 bd1 r2 100k 12v/3a j2 j1 c1 100 f 1 2 4 3 u2 p817 q2 az431 d2 d1 fr107 r8 27k r1 2m c7 470 f l2 8 h d3 c10 1000 f t c9 1nf r9 10 adj 5 sense 6 bok 3 ri 4 gate 8 vcc 7 fb 2 gnd 1 u1 ap3102 10 m 82k 3.3 f c4 cx1 d4 6.8nf 10nf r4 r5 cy c5 c6 0.1 f c9 v cb 18 k 1k r14
green mode pwm contro ller ap3102/v/l 15 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited preliminary datasheet mechanical dimensions dip-8 unit: mm(inch) 4 6 r0.750(0.030) 0.254(0.010)typ 0.130(0.005)min 8.200(0.323) 9.400(0.370) 0.204(0.008) 0.360(0.014) 7.620(0.300)typ 4 6 5 0.700(0.028) 9.000(0.354) 9.400(0.370) 3.710(0.146) 4.310(0.170) 3.000(0.118) 3.600(0.142) 0.360(0.014) 0.560(0.022) 2.540(0.100) typ 6.200(0.244) 6.600(0.260) 3.200(0.126) 3.600(0.142) 0.510(0.020)min 3.000(0.118) depth 0.100(0.004) 0.200(0.008) 1.524(0.060) typ note: eject hole, oriented hole and mold mark is optional.
green mode pwm contro ller ap3102/v/l preliminary datasheet 16 jan. 2010 rev. 1. 2 bcd semiconductor manufacturing limited mechanical dimens ions (continued) soic-8 unit: mm(inch) 0 8 1 5 r 0 . 1 5 0 ( 0 . 0 0 6 ) r0.150(0.006) 1.000(0.039) 0.330(0.013) 0.510(0.020) 1.350(0.053) 1.750(0.069) 0.100(0.004) 0.300(0.012) 0.900(0.035) 0.800(0.031) 0.200(0.008) 3.800(0.150) 4.000(0.157) 7 7 2 0 : 1 d 1.270(0.050) typ 0.190(0.007) 0.250(0.010) 8 d 5.800(0.228) 6.200(0.244) 0.675(0.027) 0.725(0.029) 0.320(0.013) 8 0.450(0.017) 0.800(0.031) 4.700(0.185) 5.100(0.201) note: eject hole, oriented hole and mold mark is optional.
important notice bcd semiconductor manufacturing limited reserves the right to make changes without further not ice to any products or specifi- cations herein. bcd semiconductor manufacturing limited does not as sume any responsibility for us e of any its products for any particular purpose, nor does bcd semiconductor manufacturi ng limited assume any liability aris ing out of the application or use of any its products or circui ts. bcd semiconductor manufacturing limited does not convey any license under its patent rights or other rights nor the rights of others. - wafer fab shanghai sim-bcd semiconductor manufacturing co., ltd. 800 yi shan road, shanghai 200233, china tel: +86-21-6485 1491, fax: +86-21-5450 0008 main site regional sales office shenzhen office shanghai sim-bcd semiconductor manuf acturing co., ltd., shenzhen office unit a room 1203, skyworth bldg., gaoxin ave.1.s., nanshan district, shenzhen, china tel: +86-755-8826 7951 fax: +86-755-8826 7865 taiwan office bcd semiconductor (taiwan) company limited 4f, 298-1, rui guang road, nei-hu district, taipei, taiwan tel: +886-2-2656 2808 fax: +886-2-2656 2806 usa office bcd semiconductor corp. 30920 huntwood ave. hayward, ca 94544, usa tel : +1-510-324-2988 fax: +1-510-324-2788 - headquarters bcd semiconductor manufacturing limited no. 1600, zi xing road, shanghai zizhu sc ience-based industrial park, 200241, china tel: +86-21-24162266, fax: +86-21-24162277 bcd semiconductor manufacturing limited important notice bcd semiconductor manufacturing limited reserves the right to make changes without further not ice to any products or specifi- cations herein. bcd semiconductor manufacturing limited does not as sume any responsibility for us e of any its products for any particular purpose, nor does bcd semiconductor manufacturi ng limited assume any liability aris ing out of the application or use of any its products or circui ts. bcd semiconductor manufacturing limited does not convey any license under its patent rights or other rights nor the rights of others. - wafer fab shanghai sim-bcd semiconductor manufacturing limited 800, yi shan road, shanghai 200233, china tel: +86-21-6485 1491, fax: +86-21-5450 0008 bcd semiconductor manufacturing limited main site regional sales office shenzhen office shanghai sim-bcd semiconductor manuf acturing co., ltd. shenzhen office advanced analog circuits (shanghai) corporation shenzhen office room e, 5f, noble center, no.1006, 3rd fuzhong road, futian district, shenzhen 518026, china tel: +86-755-8826 7951 fax: +86-755-8826 7865 taiwan office bcd semiconductor (taiwan) company limited 4f, 298-1, rui guang road, nei-hu district, taipei, taiwan tel: +886-2-2656 2808 fax: +886-2-2656 2806 usa office bcd semiconductor corporation 30920 huntwood ave. hayward, ca 94544, u.s.a tel : +1-510-324-2988 fax: +1-510-324-2788 - ic design group advanced analog circuits (shanghai) corporation 8f, zone b, 900, yi shan road, shanghai 200233, china tel: +86-21-6495 9539, fax: +86-21-6485 9673 bcd semiconductor manufacturing limited http://www.bcdsemi.com bcd semiconductor manufacturing limited


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